The area of my research work is Analog CMOS VLSI Circuit/System Design. Activities in my research team can be broadly classified into two categories. The first one involves architecture development and prototype design of analog circuits/systems in three specific topics namely, Interface unit for high-speed data link, On-chip DC-DC converter and Signal acquisition front-end. The second category of our work is about developing and prototyping automatable design methodologies for frequently used analog circuits/systems.
For high-speed data link, we have proposed a number of power-efficient high-speed data receivers and transmitters with an active terminator. Some of our design also enables simultaneous two-way data transmission over a common link.
We have proposed a switching scheme for switched-capacitor based DC-DC converter which improves the power efficiency by 5-10%. We have proposed a scheme of dynamically adjusting switching frequency of switched-capacitor based DC-DC converter which helps to maintain high power efficiency across a wide range of load current. Both, the switching scheme and switching frequency adjustment are generic enough to be applied for buck and boost converters.
We have proposed a Geometric Programming (GP) based circuit sizing method for optimum design. The sizing method is very fast and robust. The GP based optimization method has been upgraded to address practical design considerations and issues in sub-micron technologies. Prototype codes have been implemented to design a number of practical circuits meeting competitive specifications. We also have proposed a design methodology for an analog system utilizing the GP-based circuit sizing method. A prototype code has been implemented to design Analog-to-Digital Converter (ADC). To design an ADC, normally, an experienced designer takes more than 3 months, which is performed by the prototype code in 6 hours.